Pseudo-ring testing of the FPGA memory using software Nios processor

Griţcov Sergiu; Sorochin Gherman; Şestacova Tatiana

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2022-10-25 10:25

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GRIŢCOV, Sergiu, SOROCHIN, Gherman, ŞESTACOVA, Tatiana. Pseudo-ring testing of the FPGA memory using software Nios processor. In: Telecommunications, Electronics and Informatics, Ed. 6, 24-27 mai 2018, Chișinău. Chișinău, Republica Moldova: 2018, Ed. 6, pp. 328-331. ISBN 978-9975-45-540-4.

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Telecommunications, Electronics and Informatics
Ed. 6, 2018

Conferința "Telecommunications, Electronics and Informatics"
6, Chișinău, Moldova, 24-27 mai 2018

Pseudo-ring testing of the FPGA memory using software Nios processor

Pag. 328-331

Griţcov Sergiu, Sorochin Gherman, Şestacova Tatiana

Universitatea Tehnică a Moldovei

Disponibil în IBN: 1 iunie 2018

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In this paper we review FPGA of the Altera company and we present an example of a ‘software’ microcontroller based on Nios processor creating. Also an algorithm for memory self-testing was developed and implemented on C language. This algorithm provides self-testing of the Nios and FPGA memory. Also this algorithm is based on pseudo-ring testing methods, which allow to significantly reduce hardware resources for self-realization.

Cuvinte-cheie
Field Programmable Gate Array (FPGA), Nios, self-testing, psedo-ring method

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