Solving the problem of Design for Testability (DFT) supposes not just studying the modern promising ways, but deep studying of the different traditional aspects connected to synthesis of easy testable digital circuits (DC). An important particular case, is represented by the maximum degenerate homogenous digital structures (MDHDS), that are a particular case of regular DC, proposed by Gremalschi [1]. MDHDS are equivalent to a logical gate with the same number of entrances and the set of verification tests for these gates is at the same time the set of diagnosis tests. Study of the possibility for obtaining MDHDS relieved the necessity for introduction and utilization of such concepts as monotonous ascending logical function (MALF) and monotonous descending logical function (MDLF). The paper presents some structural and analytical aspects for solving the above-mentioned problem.