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 SM ISO690:2012BODEAN, Diana, BODEAN, Ghenadie, GHINCUL, Olga. Constrained-Random Verification for Synthesis: Tools and Results. In: Microelectronics and Computer Science: The 6th International Conference, Ed. 6, 1-3 octombrie 2009, Chisinau. Bălți, Republica Moldova: Universitatea de Stat „Alecu Russo" din Bălţi, 2009, Ediţia 6, pp. 302-306. ISBN 978-9975-45-122-2. |
| EXPORT metadate: Google Scholar Crossref CERIF DataCite Dublin Core |
| Microelectronics and Computer Science Ediţia 6, 2009 |
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Conferința "Microelectronics and Computer Science" 6, Chisinau, Moldova, 1-3 octombrie 2009 | ||||||
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| Pag. 302-306 | ||||||
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This paper presents the tools for automation the synthesis of constrained-random generator for verification the synthesizable designs of microprocessors and microcontrollers. The structure of constrained-random generator is coded by a stochastic grammar that is defined using the elaborated tools. Various constrained-random parameters, inclusively simulation coverage, can be estimated thanks to correspondence between stochastic grammar and the Markov chain. The performed test experiments have showed that the apriori estimations and aposteriori test results are in good agreement. |
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| Cuvinte-cheie constrained-random, Microcontroller, microprocessor, verification |
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