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SM ISO690:2012 MAKAREVICH, A., GARAGA, D., SOKOVNICH, S., KOSTYUKEVICH, Nina, KARAPETYAN, S.. Circuit Design of a Frequency Synthesizer Device for High-Speed Data Transmission Systems. In: Systems of Signals Generating and Processing in the Field of on Board Communications, 15-17 martie 2022, Moscova. New Jersey, SUA: Institute of Electrical and Electronics Engineers Inc., 2022, p. 0. ISBN 978-166540635-2. DOI: https://doi.org/10.1109/IEEECONF53456.2022.9744274 |
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Systems of Signals Generating and Processing in the Field of on Board Communications 2022 | |||||
Conferința "Systems of Signals Generating and Processing in the Field of on Board Communications" Moscova, Rusia, 15-17 martie 2022 | |||||
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DOI: https://doi.org/10.1109/IEEECONF53456.2022.9744274 | |||||
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The paper analyzes the circuitry solutions and obtains the results of modeling a frequency synthesizer circuit based on a phase-locked loop (PLL), which contains the following components: phase detectors (PD), voltage-controlled oscillators (VCO), and a counter-frequency divider (C -FD). The main components of the PLL: PD, VCO and C-FD are implemented according to the classic CMOS-circuitry. The proposed solutions for the implementation of components based on CMOS-transistors with design standards of 65 nm made it possible to create a model of a frequency synthesizer required for the implementation of onboard devices using OFDM technology. |
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Cuvinte-cheie counter / frequency divider (C-FD), frequency synthesizer (FS), phase detectors (comparators), phase-locked loop (PLL), PLL components, SPICE PLL Component Models, voltage controlled generators (VCO) |
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