Synthesis of multi-core architecture for optimal control
Închide
Articolul precedent
Articolul urmator
632 1
Ultima descărcare din IBN:
2019-05-14 10:39
SM ISO690:2012
MELNIC, Radu, BALMUŞ, Ion, ABABII, Victor, CATRUC, Mariana. Synthesis of multi-core architecture for optimal control. In: Microelectronics and Computer Science: The 5th International Conference, Ed. 8, 22-25 octombrie 2014, Chisinau. Chișinău, Republica Moldova: Universitatea Tehnică a Moldovei, 2014, Ediția 8, pp. 379-381. ISBN 978-9975-45-329-5..
EXPORT metadate:
Google Scholar
Crossref
CERIF

DataCite
Dublin Core
Microelectronics and Computer Science
Ediția 8, 2014
Conferința "Microelectronics and Computer Science"
8, Chisinau, Moldova, 22-25 octombrie 2014

Synthesis of multi-core architecture for optimal control


Pag. 379-381

Melnic Radu, Balmuş Ion, Ababii Victor, Catruc Mariana
 
Technical University of Moldova
 
 
Disponibil în IBN: 22 aprilie 2019


Rezumat

This paper offers a solution to the problem of optimal control system synthesis based on uniform multi-core architecture. For this purpose the equations that describe the control system are decomposed into a set of homogeneous equations with the same complexity and the search for the minimum value of the functional optimization is done as a sequential iterative search using a set of one-dimensional equations. In order to ensure maximum efficiency, computational power of the optimal solutions management, is uniformly distributed on a set of computing architecture controllers. AVR microcontrollers and industrial network standard I2C series were used to study the behavior of the control system. In the design process there where developed: math models, the structure of the control system, data protocol, the behavioral algorithm and the circuit of the control system based on four microcontrollers.

Cuvinte-cheie
Control system, optimal control, multi-controller architecture, I2C bus

DataCite XML Export

<?xml version='1.0' encoding='utf-8'?>
<resource xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance' xmlns='http://datacite.org/schema/kernel-3' xsi:schemaLocation='http://datacite.org/schema/kernel-3 http://schema.datacite.org/meta/kernel-3/metadata.xsd'>
<creators>
<creator>
<creatorName>Melnic, R.</creatorName>
<affiliation>Universitatea Tehnică a Moldovei, Moldova, Republica</affiliation>
</creator>
<creator>
<creatorName>Balmuş, I.</creatorName>
<affiliation>Universitatea Tehnică a Moldovei, Moldova, Republica</affiliation>
</creator>
<creator>
<creatorName>Ababii, V.V.</creatorName>
<affiliation>Universitatea Tehnică a Moldovei, Moldova, Republica</affiliation>
</creator>
<creator>
<creatorName>Catruc, M.</creatorName>
<affiliation>Universitatea Tehnică a Moldovei, Moldova, Republica</affiliation>
</creator>
</creators>
<titles>
<title xml:lang='en'>Synthesis of multi-core architecture for optimal control</title>
</titles>
<publisher>Instrumentul Bibliometric National</publisher>
<publicationYear>2014</publicationYear>
<relatedIdentifier relatedIdentifierType='ISBN' relationType='IsPartOf'>978-9975-45-329-5.</relatedIdentifier>
<subjects>
<subject>Control system</subject>
<subject>optimal control</subject>
<subject>multi-controller architecture</subject>
<subject>I2C bus</subject>
</subjects>
<dates>
<date dateType='Issued'>2014</date>
</dates>
<resourceType resourceTypeGeneral='Text'>Conference Paper</resourceType>
<descriptions>
<description xml:lang='en' descriptionType='Abstract'><p>This paper offers a solution to the problem of optimal control system synthesis based on uniform multi-core architecture. For this purpose the equations that describe the control system are decomposed into a set of homogeneous equations with the same complexity and the search for the minimum value of the functional optimization is done as a sequential iterative search using a set of one-dimensional equations. In order to ensure maximum efficiency, computational power of the optimal solutions management, is uniformly distributed on a set of computing architecture controllers. AVR microcontrollers and industrial network standard I2C series were used to study the behavior of the control system. In the design process there where developed: math models, the structure of the control system, data protocol, the behavioral algorithm and the circuit of the control system based on four microcontrollers.</p></description>
</descriptions>
<formats>
<format>application/pdf</format>
</formats>
</resource>